Regviz

NXP Semiconductors /MIMXRT1052 /FLEXRAM /INT_STATUS

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as INT_STATUS

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/MIMXRT1052/FLEXRAM/INT_STATUS#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ITCM_ERR_STATUS_0)ITCM_ERR_STATUS 0 (DTCM_ERR_STATUS_0)DTCM_ERR_STATUS 0 (OCRAM_ERR_STATUS_0)OCRAM_ERR_STATUS

OCRAM_ERR_STATUS=OCRAM_ERR_STATUS_0, ITCM_ERR_STATUS=ITCM_ERR_STATUS_0, DTCM_ERR_STATUS=DTCM_ERR_STATUS_0

Description

Interrupt Status Register

Fields

ITCM_ERR_STATUS

ITCM Access Error Status

0 (ITCM_ERR_STATUS_0): ITCM access error does not happen

1 (ITCM_ERR_STATUS_1): ITCM access error happens.
DTCM_ERR_STATUS

DTCM Access Error Status

0 (DTCM_ERR_STATUS_0): DTCM access error does not happen

1 (DTCM_ERR_STATUS_1): DTCM access error happens.
OCRAM_ERR_STATUS

OCRAM Access Error Status

0 (OCRAM_ERR_STATUS_0): OCRAM access error does not happen

1 (OCRAM_ERR_STATUS_1): OCRAM access error happens.

Links

()

Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data